California Eastern Labs introduces the UPA828TD Twin Transistor from NEC for engineers tasked with shrinking their VCO designs. The unit combines 2 closely matched silicon NPN chips in a 1.2 × 1 × 0.5 mm 6-pin leadless RoHS-compliant package. The twin transistor enables oscillator and buffer amplifier functions to be combined in 1 device. Its small size and low power consumption make it suitable for portable, battery-powered products. The chip inside is NEC's NE687 for which non-linear models can be found on the CEL Web site. Each transistor is independently mounted, so the device can be easily configured for either cascade or dual transistor operation.