Digital logic designers today have a vast array of tools at their disposal to achieve their design goals. To accommodate the large amounts of logic and the data rates required, the design engineer has the option to use large FPGAs. The FPGA provides an enormous amount of digital logic gates inside a relatively small space with high pin count packages.
With multiple high pin count FPGAs and other devices populating a printed circuit board (PCB), ensuring that all the interconnections are intact it becomes more challenging. While use of XRAY technology in manufacturing can verify gross interconnect problems, a more precise method is needed to detect interconnect problems during the manufacturing, debug, and repair of complex PCBs.
One approach is JTAG (IEEE 1149.1) technology. JTAG capabilities include the basic input/output boundary scan control mandated by the 1149.1 specification, as well as reprogrammability and control of internal resources. Many components used in digital designs have JTAG features. Microprocessors may use JTAG for providing debug access. FPGA and CPLD can use JTAG for programming. These JTAG features provide manufacturing, design and service personnel a powerful tool with which to produce high quality boards.
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