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Cypress Semiconductor Corporation announces two Zero-Delay Buffers (ZDBs). The CY23EP05 and CY23EP09 phase-locked loop (PLL) clock buffers offer desirable operating frequency, low cycle-to-cycle jitter and one of the lowest output-to-output skews on the market. The products add to the company’s portfolio of timing solutions for applications such as multiservice routers and switches, basestations, plasma displays and set-top boxes. These ZDBs offer good performance, with a 220 MHz maximum operating frequency and 3.3 or 2.5 V operating voltage. In addition, the CY23EP05 and CY23EP09 offer 55 ps cycle-to-cycle jitter and 100 ps output-to-output skew. Both devices are available in lead-free packages.


Cypress Semiconductor Corp.


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