Glossary of Acronyms

3B4B — An encoding scheme that translates 3-bit bytes into 4-bit coded words using running disparity.
ADM — Adaptive Delta Modulation
ADPCM — Adaptive Delta Pulse Code Modulation
CBUS — Control Bus (Nortel)
CVSD — Continuously Variable Slope Delta
DCO — Digitally Controlled Oscillator
FLASH — A type of electronically erasable programmable read-only memory.
IF — Intermediate Frequency
LDO — Low Dropout
MOS — Mean Opinion Score
PCB — Printed Circuit Board
PCM — Pulse coded modulation
PLL — Phase-Locked Loop
RAM — Random Access Memory
SNR — Signal-to-Noise Ratio
SPI — Serial Peripheral Interface
TDD —Time-Division Duplexing
USART — Universal Synchronous/Asynchronous Receiver/Transmitter (also called SPI port)

Part II continues the dicussion on improving voice quality with ADM with a presentation of the reference design and the conclusion.

This design was implemented on a 2.5 cm × 3.3 cm four-layer PCB. The use of smaller components and tighter spacing can allow an even smaller form factor. The block diagram for this ADM reference design is shown in Figure 1. The design concept uses a "master" unit and "slave" unit that communicate wirelessly in a license-free RF band. TDD is used to simulate a full-duplex communication link. Operation is similar on both the master and slave units. While particular manufacturer’s devices are used in this reference design, equivalent device can be used and similar results can be obtained.

The ADM voice codec encodes the microphone input with 27.8 kb/s ADM voice coding. The encoded voice data are passed to a microcontroller for 3B4B coding and frame formatting. The coded data frames are then passed to the RF transceiver for filtering, up-conversion and transmission in either the USA (902 to 928 MHz) or European (863 to 865 MHz) license-free band. The transmitted data rate is 100 kb/s, and the exact channel frequency is selected by software configuration.

click the image to enlarge

Figure 1. ADM Reference design block diagram.

After reception, the RF transceiver passes the recovered data frames to the microcontroller for de-formatting. The microcontroller then sends the raw data stream to the voice codec for signal reconstruction, and the recovered audio can be heard on a speaker (Data framing is used in this project for TDD, which is required to achieve the perceived full-duplex effect).

Data are transferred over the RF link in a half-duplex manner, but the perceived effect is full-duplex because the transceiver’s data rate is more than twice that of the ADM voice codec. The TDD scheme is implemented with a firmware-based buffering scheme that manages the difference in data rates between the RF transceiver and the voice codec. The microcontroller’s on-chip memory is used to buffer the transmit and receive voice data until ready for further processing.

In addition to the TDD scheme, the microcontroller firmware also accomplishes a "pairing" procedure that causes the master and slave units to communicate together while ignoring signals from other sources. (See Figure 2.) The ADM codec’s voice activity detector is used to determine when the circuit is placed into "sleep mode." If voice is absent for more than 23 seconds, the boards will enter powersave mode ("low-power mode 0"). The master and slave boards, if paired, will wake from powersave mode when voice is presented at the audio input to the master board.

The Voice Codec

The particular voice codec used in this design was selected because of its robust ADM voice coding, low power consumption and highly integrated feature set. It offers extensive flexibility in its ADM voice coding settings, and the settings chosen for this project were empirically derived to offer optimal voice quality in this application.

In addition to performing ADM voice coding, other device features available in this design include:

  • programmable anti-alias and anti-image filtering
  • microphone amplifier
  • programmable scrambler
  • volume control

Two interfaces are used between the voice codec and the microcontroller. Control signals are sent to the voice codec via its CBUS serial interface, while voice data are transferred between the microcontroller and codec over its "burst mode interface."

The Microcontroller

click the image to enlarge

Figure 2. Data processing flow path.

The microcontroller was selected for this project because of its low power consumption and rich feature set. This particular device provides 8 kB of FLASH and 256 B of RAM. The entire RAM is used for variables and stack pointer space, and less than 4 kB of FLASH is used in this project.

The microcontroller is placed in its active mode during voice communications and performs all required system management functions. The microcontroller operates from a 3.3 V power supply. The 8 MHz crystal sources the microcontroller’s "basic clock module" during normal operation, and the DCO provides the timing signal during sleep mode operation.

Two USARTs were required for this design, one for the codec-to-microcontroller communications and one for transceiver-to-microcontroller communications.

The microcontroller, with its one SPI port, was selected over other family members because of its cost savings. The microcontroller’s single SPI port services the communications between the transceiver and the microcontroller. A second SPI port, needed for the communications between the voice codec and the microcontroller, is emulated with a "bit-banging" routine.

The watchdog timer is disabled during normal operations. When the design is placed in sleep mode, the watchdog timer occasionally causes the circuitry to power up and check for audio signals.

The Transceiver

A "zero-IF" single-chip transceiver was selected for this design because of its low external component cost and device flexibility, and its ability to block co-channel interference. The transceiver operates from a dedicated 2.5 V voltage regulator to optimize noise performance.

Transmit data are applied directly to the transceiver’s VCO in this design. The inherent high-pass filter characteristic of PLL-based synthesizers means that direct VCO modulation of a data signal can result in undesired attenuation in the signal passband.4 To prevent this situation, the transmit data is 3B4B-encoded in the microcontroller to ensure that the bandwidth of the data signal is high enough to be passed by the synthesizer. Encoding increases the transmit data rate by one-third, resulting in the 100 kb/s rate of data transfer both in and out of the transceiver. The transceiver uses an internally generated data clock signal to control the exchange of data with the microcontroller.

A 200 mAH lithium polymer rechargeable battery was selected for this design because of its small form-factor and large energy density. The design can also easily accommodate other types of batteries.

The flexibility of this particular codec and the microcontroller allow operation with extremely low power consumption. While the exact current consumption is a function of many variables (e.g., user’s voice volume and how often the user speaks into the microphone), the observed current consumption during normal operation is about 19.25 mA, which translates to an estimated "talk time" of 10.4 hours with the 200 mAH battery. The observed current consumption for sleep mode is 90 µA, and this translates to a "standby time" of approximately 92 days. (These values are based on 100% battery capacity being available for use, but the low discharge rate of this design makes this assumption reasonably accurate.)

LDO regulators provide 2.5 V to the RF transceiver and 3.3 V to both the microcontroller and voice codec. The speaker driver is connected directly to the battery to minimize current-surge noise from propagating to the rest of the circuitry.

The Results

Wireless digital voice transmission is popular in today’s consumer electronics. Cordless telephones, wireless headsets and baby monitors are a few products that use digital techniques to wirelessly communicate voice information. ADM voice coding should be considered for these applications because of its bit error robustness and low implementation cost. This article has described ADM, explained the benefits of ADM, and introduced an ADM reference design that can be used as a "seed" for a wireless voice project. Designers may find this information useful and might consider ADM for their next wireless voice project.

About the Author

Ron Hunter is an applications engineer for CML Microcircuits. He received a B.S.E.E. from the University of North Carolina-Charlotte and has completed multiple graduate engineering courses from North Carolina State University.


1. Steele, R., Delta Modulation Systems, Pentech Press, London, 1975. 2. CML Microcircuits Application Note, "Continuously Variable Slope Delta Modulation (CVSD): A Tutorial,"

3. Jayant, N.S., and P. Noll, Digital Coding of Waveforms; Principles and Applications to Speech and Video, Prentice-Hall, Englewood Cliffs, N.J., 1984.

4. CML Microcircuits Application Note, "Using Two-Point Modulation To Reduce Synthesizer Problems When Designing DC-Coupled GMSK Modulators,"

Additional information can be found at the following websites:

• ADM Reference Design schematics, board layout files, microcontroller code and CMX649 specifications,
• RF Transceiver and Low-dropout regulators,
• Microcontroller and audio amplifier,
• Lithium-polymer rechargeable battery,

Note: Sound files that demonstrate ADM voice quality for various sampling rates can be found at