<Editor's Note: To better view this article and its tables, please down load the PDF version.

     To many, Silicon Germanium (SiGe) is a new technology that is the rage with every wireless chip company, but SiGe transistors experiments began fifteen years ago. Integrated circuit (IC) designers saw SiGe as a viable alternative to Gallium Arsenide (GaAs), which was the de-facto technology choice at the time. SiGe offered GaAs-like performance at a lower cost, higher integration levels due to silicon's ability to form insulating oxides, and better thermal dissipation.

Figure 1. SiGe BiCMOS Transceiver Exhibiting Passive Components

     It took more than a decade before SiGe ICs such as Atmel's U7004B DECT LNA/PA became available. Since then, many companies have introduced wireless "building block" devices (e.g. LNA, VCO, Mixers). Today's wireless customers demand higher integration, lower cost, and more programmability, driving wireless IC suppliers to develop SiGe BiCMOS technologies. Also, with Bluetooth, wireless LAN, and cellular devices becoming more ubiquitous, more engineers are being pressed into service as RFIC designers, a term coined only a decade ago.

SiGe BiCMOS Advantages

     When a designer takes on a new project, it's like a painter preparing to create his next masterpiece. Oil paints, watercolor, and charcoals are equally capable of representing a subject. Similarly, a Bluetooth transceiver can be designed in many process technologies (e.g. CMOS, BiCMOS, SiGe...). Which medium is chosen depends heavily on the nuances of the intended result. It also depends on the comfort level of the creator with the various media. SiGe BiCMOS offers a comfort level for silicon designers that GaAs simply cannot offer.

     Silicon Germanium BiCMOS is especially well suited to portable wireless applications where its characteristics offer significant advantages. The most cited advantage of SiGe is SPEED, expressed as transition frequency (ft) and/or maximum frequency (fmax). Though press releases tout experimental silicon switching at 210 GHz, even readily available silicon with 70 GHz ft is more than sufficient. For portable applications, speed can often be traded for lower current. This "excess" speed is also being harnessed to enable novel radio architectures, such as receivers that directly sample the incoming signal at the carrier frequency.

     However, speed is just one of SiGe's many advantages. Noise Figure (NF) is a measure of a receiver's output noise power as compared to an ideal receiver. This noise is typically dominated by the LNA input transistor. SiGe's higher gain, or Beta (Β) and lower base resistance (Rbb') combine to minimize both thermal (Johnson) and shot (Schottky) noise. Noise Figures < 1 dB at 2 GHz have been reported in commercially available SiGe devices.

     As spectrum gets crowded and wireless data rates increase, linearity becomes critical. SiGe exhibits excellent linearity due to a large Beta * VA (Early voltage) product. Receiver linearity is related to third order intercept point (IP3), where a higher IP3 results in improved immunity to interference. For transmitters, the 1dB compression point (P1dB) determines how much power can be transmitted without significant distortion.

     Portable system supply voltages are decreasing. This trend has accelerated due to shrinking breakdown voltages of ever-smaller CMOS transistors. Silicon speed falls off, sometimes precipitously, as voltage across the transistor drops. This effect is less severe in SiGe, as its speed is less dependent upon high field strength. Therefore, a marginally superior 3V SiGe device becomes significantly superior at 1.8 V.

The Other Half of the Story

   Just as it's easy to get caught up in evaluating a process by its ft, it is easy to focus only on transistor performance. Wireless die area and performance depend heavily on the availability of high quality integrated passive devices, like those shown for Atmel's AT46700 SiGe BiCMOS in Table 1.

     It is critical that a wireless process offer resistors with a wide range of sheet resistances. Resistors are typically made from polycrystalline silicon (poly) layers isolated from the silicon substrate by oxide. Several poly resistors are usually offered, each an order of magnitude more resistive than the next. Ideally, these resistors will have minimal variation with temperature and voltage (i.e. be highly linear) as well as maintain low parasitic capacitance, which can cause signal distortion.

     Capacitor technology has come far. Early integrated capacitors were made with a single plate of metal over silicon, separated by oxide (MOS). These devices were leaky, nonlinear, and asymmetric. Later, two plates of poly were placed in the oxide above the silicon (DPC). Linearity and leakage was greatly improved, but parasitic resistance became an issue as signal frequency was increased. Poly was replaced with metal, resulting in higher Quality Factor (Q) metal-insulator-metal (MIM) capacitors. Capacitor area can be further reduced by using newer dielectrics such as tantalum pentoxide (T2O5).

     Unlike the high quality inductors available in GaAs technology, thin metal layers and conductive substrates often make integrated silicon inductors less desirable than their discrete counterparts, regardless of size or cost. Thicker, lower resistance metals placed further above the silicon have created inductors with Q <30 at 2 GHz.

Table 1. AT46700 0.35 um SiGe BiCMOS Technology Summary. (Editor's Note: This caption refers to ALL of the tables in this article)

 If integration and cost are key, then isn't the ultimate wireless solution CMOS?    

     Nearly every wireless building block has been demonstrated in CMOS and numerous CMOS RF products have been announced, including Atmel's own AT86RF401 monolithic Flash AVR micro / RF transmitter. However, all of these products are relatively new and have not yet been proven in high volume production.   

   CMOS does have advantages. Significant investments are being made to develop CMOS technologies with the smallest possible gate length. However, this development focuses on the needs of digital IC designers. Digital transistors are nearly always ON or OFF. To accommodate smaller, more fragile transistors, supply voltages are lowered. Consequently, threshold voltages (Vt) are also lowered resulting in increased leakage current. Thus the linearity of the "digital" CMOS transistor is severely compromised. Shrinking gate lengths do, however, assist CMOS in overcoming one of its historically most restrictive drawbacks; higher noise figure.

     Let's consider some of the fundamental assumptions regarding RF CMOS.

1. CMOS is cheap. Valid, but less so for RF CMOS. The additional layers required to implement high quality passives increase mask count, sometimes even beyond that of SiGe BiCMOS. Even "standard" CMOS mask counts have continued to increase to realize these smaller gates. For digital circuits, this cost is easily offset by increased circuit density. However, for analog or RF circuits like the wireless transceiver in Figure 1, where passive elements typically account for a large portion of the circuit area, the cost advantage is not clear.

     So if RF CMOS is no less expensive than SiGe BiCMOS, then why use it?

2. RF CMOS allows system-on-chip integration. This assumption is irrefutable, given that the RF CMOS circuitry can be successfully implemented and manufactured. However, there are several disadvantages to pursuing this monolithic strategy:

• The entire chip must be run through all of the RF-specific process steps, which could result in a higher overall cost.

• Crosstalk and substrate noise from digital circuits could interfere with incoming RF signals. Minimizing substrate noise is critical for good RF performance.

• CMOS digital libraries allow rapid migration from one process to the next. This is not true for analog and RF circuitry, where a new technology means an entire redesign, thus delaying potential cost savings.

     Instead, if the digital circuitry was separated from the RF, it could be manufactured in "standard" CMOS and migrate at will to the next generation technology unencumbered by the analog blocks. The RF circuitry can then be designed in an appropriate technology, like SiGe BiCMOS. Packaging technology has evolved to the point where multiple die can be "stacked" with bond wires connecting the die to each other and to the package resulting in a single package solution. Atmel routinely uses such techniques to develop compact, cost-effective products.

3. Unlike SiGe BiCMOS, RF CMOS is readily available from multiple suppliers, including pure play foundries. This was certainly the case in the past, but recently many vendors have announced SiGe BiCMOS foundry services. As more suppliers become available, competition will lower SiGe BiCMOS wafer prices. Atmel has established process roadmaps that address our foundry customers' cost and performance needs now and into the future.

4. CMOS is lower power than BiCMOS. This assumption is based on digital logic. CMOS logic burns no quiescent current, while bipolar logic requires constant current. Analog CMOS, however, uses just as much, if not more current than analog bipolar circuits, since these circuits are both used in the linear region.

     I am not suggesting that RF CMOS has no future, but rather that the underlying motivations for building RF CMOS products may not be as urgent nor as compelling as once thought. Certainly transceivers for relaxed standards such as Bluetooth can be implemented in RF CMOS. Meanwhile, SiGe BiCMOS will continue to gain market share, given the modest cost penalty over BiCMOS (5% - 15%) and its unique ability to integrate reasonably dense logic with high performance RF.


    SiGe BiCMOS is a key enabling technology (though not the only one) for future wireless devices, given the industry's need for long battery life, low cost, and high integration.

Mark Jakusovszky is the marketing manager for RF Wireless Products, for Atmel Corporation, located in Colorado Springs, CO.