Dubbed PowerPAK, the new packaging technology will enable devices with thermal resistance of <1°C/W, or approximately the same as a twice-as-large, twice-as-thick DPAK power MOSFET. By comparison, thermal resistance is 16°C/W for a single-channel, standard SO-8.
PowerPAK devices achieve thermal performance by providing a direct thermal path from the backside of the copper die attach pad to the printed circuit board. Unlike power MOSFET packages with an exposed die, PowerPAK's design provides a consistent footprint regardless of the particular silicon used in a given device, eliminating the need for retooling to accommodate devices with different on-resistance ratings.
In addition to their thermal performance, on-resistance for the new PowerPAK devices will be low for their package size comparable to best-in-class DPAK power MOSFETs, since the new SO-8 PowerPAK offers the same cavity size, and can thus use the same die, as devices packaged in the DPAK package.
Increases in processor frequencies are driving up power demands in notebook and desktop computers and handheld information appliances, while the market continues to put a premium on end products that are as thin and lightweight as possible. In portable wireless communications devices, keeping heat to a minimum is essential. PowerPAK addresses these challenges by handling higher current densities without increasing the board space occupied by power semiconductors and without generating additional heat. For this reason, PowerPAK will be key to enabling end products that use the most advanced processor technologies while also supporting the market's demand for greater portability.
Siliconix is introducing PowerPAK power MOSFETs with devices in the SO-8 size and also in a 1212-outline, 8-pin package that will offer on-resistance performance comparable to many devices in the TSSOP-8 but with a 48% smaller footprint, an 11% thinner height profile, and dramatically lower thermal resistance of <2°C/W. Thermal resistance is 34°C/W for the standard TSSOP-8 package.