Xilinx announces the latest version of its PlanAhead software, a hierarchical design and analysis solution that, along with Xilinx ISE software, delivers a high performance advantage for Xilinx Virtex-4 and Spartan-3 FPGAs. The release also simplifies partial reconfiguration for Xilinx FPGAs. Additional PlanAhead 8.1 productivity enhancements include the ExploreAhead feature, which allows designers to employ multiple design strategies to meet their timing goals. The new release simplifies the creation of dynamic modules and allows customers to create multiple floorplans for each of their design implementations. PlanAhead 8.1 enhancements offer additional design rule checking, overlap detection, automatic macro creation for module-to-module IO and a new place-and-route wizard.