Lattice Semiconductor Corporation announces a programmable PCI Express solution that incorporates the LatticeECP and LatticeEC FPGA devices, the Genesys Logic GL9711 PCI Express PHY, and Northwest Logic’s PCI Express IP core. Northwest Logic, the newest member of the Lattice ispLeverCORE Connection program, provides its single lane PCI Express IP core tailored to the LatticeEC and LatticeECP device architectures. The LatticeECP-DSP and LatticeEC FPGA device families are architected to provide optimized feature sets combined with one of the lowest total solution costs of any FPGAs. The LatticeECP-DSP products, targeted for high performance DSP applications, provide up to a 50% performance and 75% logic utilization improvement over other low-cost solutions when implementing common DSP functions. The LatticeEC FPGA product family, targeted for general-purpose FPGA applications, is in response to the market's demand for architecturally streamlined logic solutions. The GL9711 supports both 8-bit and 16-bit PIPE interfaces at 250 and 125 MHz PIPE clock, respectively. It also has an elastic buffer to absorb the potential clock rate difference up to ± 300 ppm.
Lattice Semiconductor Corp.