Circuit diagram of a synchronous buck converter.Optimizing output stage component selection

Switched mode power converters are very prominent in industry today and provide high efficiency solutions for a wide range of end applications. They can be found in power supplies and battery charging circuitry for computers, power tools, televisions, media tablets, smart phones, automobiles, and countless other electronic devices.

One of the most popular converters for the consumer electronics industry is the DC-DC step−down converter, also known as the buck converter.

In simple terms, the synchronous buck converter is used to step a voltage down from a higher level to a lower level. With industry moving to higher performance platforms, the efficiency of the power converter is a critical design consideration. Because of this, it is important to understand the fundamentals of the synchronous buck converter and how to appropriately select the circuit components.

Synchronous Buck Converter Basics

The synchronous buck converter is straightforward in concept, it produces a regulated voltage that is lower than its input voltage, and can deliver high currents while minimizing power losses.

The synchronous buck converter is comprised of two power MOSFETs, an output inductor and an output capacitor. This specific buck topology derives its name from the control method of the two power MOSFETs; the on / off control is synchronized in order to provide a regulated output voltage and to prevent the MOSFETs from turning on at the same time.

The high side MOSFET (Q1) is connected directly to the input voltage of the circuit. When Q1 turns on, current is supplied to the load through it. During this time, the low side MOSFET (Q2) is off and the current through the inductor increases, charging the LC filter. When Q1 turns off, Q2 turns on and current is then supplied to the load it. During this time, the current through the inductor decreases, discharging the LC filter. The low side MOSFET provides an additional function when both MOSFETs are off in that it clamps the switch node voltage via the body diode to prevent the switching voltage (VSW) from going too far negative when the high side transistor first turns off.

The switch node voltage is smoothed out by the LC output stage in order to produce a regulated DC voltage at the output. The MOSFETs are controlled synchronously to prevent shoot−through. which occurs when the high side and low side devices are both on at the same time, creating a direct short to ground.

The high side MOSFET on−time determines the duty cycle of the circuit. If the duty cycle, is equal to 1 then the high side MOSFET is on 100% of the time and the output voltage equals the input voltage. A duty cycle of 0.1 means that the high side MOSFET is on 10% of the time, producing an output voltage that is approximately 10% of the input voltage.

Buck Converter Power Loss

The buck converter power losses are influenced by multiple factors, including the power MOSFETs, output stage, controller / driver, feedback loop, and the layout of the converter itself. The duty cycle is less than 0.5 for most buck converter designs, with a standard duty cycle of 0.1 to 0.2 in the computing and server market.

Design platforms are moving to higher switching frequencies, providing the ability to reduce converter size and form factors. At the same time, converters must deliver greater performance and have higher efficiency. The output stage performance greatly impacts the overall performance of the buck converter. For this reason, it is important to optimize the inductor and capacitor selection for the specific application.

LC Output Stage

The output stage of the synchronous buck converter is comprised of an inductor and capacitor. It stores and delivers energy to the load, and smoothes out the switch node voltage to produce a constant output voltage.

Inductor selection directly influences the amount of current ripple seen on the inductor current, as well as the current capability of the buck converter itself. Inductors vary from manufacturer to manufacturer in both material and value, and typically have a tolerance of ± 20%. Inductors have an inherent DC resistance (known as the DCR) that impacts the performance of the output stage. Minimizing the DCR improves the overall performance of the converter. For applications that require a high load current, it is recommended to select an inductor with a low DCR. The DCR is smaller for lower inductor values, but there is a trade−off between inductance and ripple current; the lower the inductance, the higher the ripple current through the inductor. A minimum inductance must be met in order to meet the ripple current requirements of the specific application circuit.

The output capacitance directly affects the output voltage of the converter, the response time of the output feedback loop, and the amount of output voltage overshoot that occurs during changes in load current. A ripple voltage exists on the DC output as the current through the inductor and capacitor increases and decreases. Increasing the capacitance reduces the amount of ripple voltage present. However, there is a tradeoff between capacitance and the output response. Increasing the capacitance reduces the output voltage ripple and output voltage overshoot, but increases the time it takes the output voltage feedback loop to respond to changes in load. Therefore, a minimum capacitance must be considered, in order to meet the ripple voltage and voltage overshoot requirements of the converter, while maintaining a feedback loop that can respond quickly enough to load changes.

Capacitors also have a parasitic series resistance, known as the equivalent series resistance (ESR). The ESR impacts the output voltage ripple and the overall efficiency of the converter. Because of this, designers are moving to low ESR designs. Surface mount ceramic capacitors are becoming prevalent in systems that require high performance in a small form factor. The use of multiple capacitors in parallel allows designers to achieve the necessary capacitance for the system while greatly reducing the equivalent ESR.

Basic LC Design

When designing the buck converter output stage, it is recommended to begin with the inductor. The minimum inductance is calculated based on the target ripple current and other application circuit specifications. Once the inductor has been selected, the minimum capacitance can be determined.

There is a tradeoff between inductance and ripple current. Lower target ripple current equates to higher minimum inductance. To optimize the output filter performance it is recommended to target 20% − 40% inductor ripple current.

Calculating maximum ESR and minimum capacitance is required to maintain a regulated output voltage while the high side MOSFET is off, and is necessary to minimize the amount of ripple present on the output voltage. The output voltage ripple can be expressed as a peak−to−peak voltage or in terms of the Capacitor Voltage Ratio, or CVR.

The larger the output capacitance value and ESR, the longer it takes for the output to respond to changes in load. ESR also influences the output voltage ripple.

When the high side MOSFET is on, current through the inductor and capacitor is increasing, and the output voltage increases. When the high side MOSFET is off, current through the inductor and capacitor are decreasing, and the output voltage decreases. In order to achieve a constant output voltage, the amount of capacitor current increase must be equal to the amount of capacitor current decrease. Therefore, the steady state current through the capacitor is 0 A.

As well as considering the effect of output ripple voltage and inductor ripple current on the output capacitance, the transient load response capability of the output stage must also be considered. The synchronous buck converter must be able to respond to changes in load current while maintaining a regulated output voltage. When the load current changes from a higher value to a lower value, the output voltage will temporarily increase until the converter is able to adjust the duty cycle to return the output voltage to its regulated value. This temporary output voltage increase is known as output voltage overshoot. The worst case overshoot will occur when the load transitions from maximum load to no load. The output capacitor must be able to handle this transient condition. There is a tradeoff between the output voltage transient response and output voltage ripple. These two must be balanced for the needs of the specific application.

A good rule of thumb when selecting capacitance is to choose an output capacitor value that is at least 20% higher than the minimum calculated capacitance, to account for capacitor tolerance.

The buck converter output filter design affects the output current ripple, output voltage ripple, output voltage overshoot, and the transient response of the feedback loop. Component selection also impacts the efficiency of the converter. The efficiency of a synchronous buck converter is most impacted by the output inductor selection. Both the inductor value and DCR significantly affect the performance.


The output stage of a synchronous buck converter plays a significant role in the performance of the converter. In order to meet the target ripple current, output ripple voltage, and output voltage overshoot, a minimum inductance and capacitance must be exceeded. Additional factors must also be considered when selecting an inductor and capacitor for a specific application. The output stage can be optimized by designing for the specific application criteria that it will be operating in.

The inductor value plays a significant role in the output ripple current, as well as in the converter’s efficiency performance. Furthermore, the output voltage ripple improves with a higher output capacitance. The efficiency of the converter is greatly impacted by the DCR of the inductor used.

There is a tradeoff between inductance and saturation current for inductors. Therefore, to meet or exceed a ripple current requirement, the inductance must be greater than the minimum calculated inductance, and the saturation current of the inductor must be greater than the peak current of the converter at maximum load.

Capacitance also plays a significant role in the performance of a synchronous buck converter. Output capacitance directly influences the amount of voltage ripple and voltage overshoot seen on the output. However, capacitance has a minimal effect on the efficiency performance of the converter.

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