It’s not uncommon to look at a discrete component’s datasheet and think that the manufacturer might be willing and able to tweak the performance for you in exchange for a little NRE and an up charge on the standard price. But a MMIC is another story. Or is it?
Like so many things, advanced government and space programs have been influencing the MMIC market for years. As an example, a 2011 ARMY SBIR award challenged it’s participants to improve a power amplifier (PA) within an X-band transmit phased array system. The contractor had been using an off-the-shelf 5 to 9 GHz PA that was sub-optimal for the much narrower X-band application. This particular PA was also based on a depletion mode process, so it required an extra bias sequencing circuit to ensure that the negative gate voltage was applied before Vdd. The winner of the award, Custom MMIC of Westford, MA, designed and subsequently delivered a power amplifier that delivered 5 dB more gain, 1 dB more power, and 2 dB improved linearity while dissipating 25% less DC power. In switching to an enhancement mode process, they also eliminated the wasteful bias sequencing circuit and allowed the Vdd to be applied at any time with no current draw until the enable line was energized.
Sounds expensive, right? While challenging to compute exact impact on the bottom line, a major part of the Army’s award decision was based on cost savings and delivery. The enhancement mode process that Custom MMIC used has been part of their design library since their inception over 5 years ago. Like Silicon device suppliers have done for years, GaAs and GaN MMIC suppliers like Custom MMIC are now stacking up incredible amounts of IP like this that they can draw upon to solve problems rapidly. Many of them are offering reduced pricing if your ultimate device is marketable and your needs for exclusivity are limited.
The key in approaching a MMIC supplier with a custom request is engaging with a company who is privy to new fab processes from the major foundries delivering advanced technology. These are often “fabless” companies. Upon receipt of a new fab process and relevant FET structures (a single device, if you will), engineers at these companies will typically measure this device for its DC and RF characteristics and use this data as the baseline (FET model) for all designs with that foundry. The designs are then augmented with matching structures around each device and the devices are enlarged, reduced and stretched, etc. to provide various circuit components in their IP library. What you’ll want to be asking is, how have they proven to be able to predict how this collective IP will perform based on the original device evaluation? The answer to this question, coupled with the designer’s proven ability to define their process from design through test, should solidify your decision.
Beginning with specification definition and simulation, your ideal resource should be able to demonstrate how they’ll work with you to break down functionality to the component level, including cascade analyses. Then, they should place importance on simulation (Figure 1), not only as a way to test an application and production-readiness, but as a method for pushing performance. Most experts use linear and non-linear simulators to replicate all aspects of the design.
Figure 1- Simulation Image
Package requirements are an essential consideration that must be taken into account before design begins. Be sure your partner has layout kits for ensuring designs meet packaging size and pin orientation requirements — including layouts for pCells, DRS and LVS decks.
Coupling factors related to layout proximity must then be resolved using electromagnetic techniques. Commercial software is most commonly used for electromagnetic analyses.
The long-term reliability of any component, active or passive, then depends on proper thermal remediation. Effective remediation requires creating thermal modeling (Figure 2) specific to the design being analyzed. Look for partners who can demonstrate things like thermal shunting of landed metal around a Heterojunction Bipolar Transistor (HBT), FET modeling, or heating within resistors in an attenuator circuit.
Figure 2 - Themal Image
A final checkpoint is a MMIC supplier’s capacity to measure and test your devices. Be sure your supplier has in-house measurement and test capacity with both vector and scalar test capabilities upwards of 50 GHz as well as on-wafer testing capabilities.
Finally, no product release would be complete without complete documentation. Ensure all aspects of design will be examined and vetted prior to release and that you’ll have the supporting documentation to prove expected performance. Critical pre-release steps typically include ESD testing, over-temperature testing, burn-in and application support.
With this knowledge, and a driving desire to get more out of your MMIC real estate, you might just find a custom solution is the perfect cure to your system needs—and your budget.
About the Author
Posted April 25, 2012