Cypress’ Asynchronous SRAMs with On-Chip Error-Correcting Code
Cypress Semiconductor (San Jose, CA) announced the sampling of a 16 Mb Fast Asynchronous SRAM with Error-Correcting Code (ECC). The on-chip ECC feature enables the new SRAMs to provide the highest levels of data reliability, without the need for additional error correction chips—simplifying designs and reducing board space. The devices ensure data reliability in a wide variety of industrial, military, communication, data processing, medical, consumer and automotive applications. Features include:
- 10-ns access time.
- Pin-compatibility with current Asynchronous SRAMs, enabling customers to boost system reliability while retaining board layout.
- A hardware ECC block in Cypress’s new Asynchronous SRAMs performs all error correction functions inline, without user intervention, delivering best-in-class Soft Error Rate (SER) performance.
For more information, visit www.cypress.com.