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XMC Module Mates Configurable Virtex-5 FPGA with High-Speed PCIe Interface and Deep Memory

Thu, 10/14/2010 - 8:26am
WIXOM, Mich., /PRNewswire/ -- Acromag's new XMC FPGA module, the XMC-VLX, features a configurable Xilinx Virtex-5 FPGA enhanced with multiple high-speed memory buffers and a high-throughput PCIe interface. Field I/O interfaces to the FPGA via the rear J4/P4 connector and/or with optional front mezzanine plug-in I/O modules.

The result is a powerful and flexible I/O processor module that is capable of executing custom instruction sets and algorithms. Typical uses include hardware simulation, military servers, in-circuit diagnostics, communications, signal intelligence, and image processing.

Three models provide a choice of logic-optimized FPGAs to match the performance requirements. Cards can be ordered with a Xilinx VLX85T, VLX110T, or VLX155T FPGA featuring up to 155,000 logic cells and 128 DSP48E slices. Each model is ready for use in conduction-cooled systems and offers an option to upgrade with extended temperature range parts suitable for -40 to 85 degrees C operation.

64 I/O lines are accessible through the rear (J4) connector. Additional I/O processing is supported on a separate mezzanine card that plugs into the FPGA base board. A variety of these mezzanine I/O cards are available to provide front-end 14-bit 105 MHz A/D conversions or an interface for CMOS digital I/O, RS-485 differential signals, or extra LVDS I/O lines.

Large, high-speed memory banks provide efficient data handling. Generous 32M x 32-bit DDR2 SDRAM buffers store captured data prior to FPGA processing. The data is directly accessible through the FPGA. Afterward, data is moved to the 1M x 64-bit dual-ported SRAM for high-speed DMA transfer to the bus or CPU. This memory provides direct links from the PCIe bus and to the FPGA. The high-bandwidth PCIe 4-lane interface ensures fast data throughput.

Acromag's Engineering Design Kit provides utilities to help users develop custom programs, load VHDL into the FPGA and to establish DMA transfers between the FPGA and the CPU. The kit includes a compiled FPGA file and example VHDL code provided as selectable blocks with examples for the local bus interface, read/writes, and change-of-state interrupts to the PCI bus. A JTAG interface allows users to perform on-board VHDL simulation. Further analysis is supported with a ChipScope™ Pro interface.

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