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Single-Chip 8 to 32-Core Processors Target Energy-Efficient Data Center, Mobile Internet and the Borderless Enterprise

Tue, 05/11/2010 - 9:40am

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SUNNYVALE, Calif., May 11, 2010 (GlobeNewswire via COMTEX) -- MIPS Technologies, a provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced that its MIPS64® architecture is powering the new OCTEON® II CN68XX/67XX processor families introduced today by Cavium Networks.

The new processors integrate 8 to 32 enhanced MIPS64 cores with up to 48 GHz of 64-bit compute power in a single chip, delivering high performance and application acceleration for borderless enterprise, mobile internet infrastructure, secure data center and cloud computing applications. The processors also deliver a high level of power efficiency with new technology that dynamically adjusts power based on the application-level processing requirement.

"MIPS is the architecture of choice for networking and communications applications, delivering ultra high-performance, energy efficiency and an unsurpassed ecosystem for these applications," said Syed Ali, president and CEO, Cavium Networks. "Through our close relationship with MIPS Technologies and the openness and flexibility of the MIPS® architecture, we are delivering groundbreaking processors with an unprecedented level of compute power. We are seeing increasing adoption of our OCTEON processors among a wide range of Tier-1 companies. We are also aggressively expanding our served markets across the Enterprise, Data Center and Service Provider segments."

Cavium's MIPS-Based™ OCTEON II products are supported by more than 50 tier-1 partners providing operating systems and tools, software applications/stacks, debuggers, complementary silicon, ATCA and hardware appliances, consulting, and other products and services.

The MIPS64 architecture sets a new performance standard for 64-bit MIPS-Based embedded processors. By incorporating powerful features, standardizing privileged mode instructions, supporting past ISAs and providing an upgrade path from the MIPS32® architecture, the MIPS64 architecture provides a solid high-performance foundation for future MIPS processor-based development.

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