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Commercially Available Multi-Time Programmable NVM Solution at 65-Nanometer Low Power

Mon, 06/08/2009 - 12:15pm
Virage Logic Corporation announces that it has qualified its AEON® non-volatile memory (NVM) solution on TSMC’s 65-nanometer (nm) Low Power (LP) process. As the industry’s first multi-time programmable (MTP) logic NVM solution that is commercially available on a 65nm process, AEON further extends Virage Logic’s NVM provider leadership position.

AEON enables IC manufacturers to embed NVM at advanced logic processes—something that was previously limited to the use of one-time programmable fuse technology—and design a truly multi-programmable product with greater flexibility and higher performance. Eliminating external EEPROM from system designs allows companies to reduce power, area and cost and increase security.

AEON also enables product differentiation by enabling features such as in-field customization, calibration, encryption keys and non-volatile counters.

The design of Virage Logic’s AEON NVM is based on a standard logic CMOS process with no additional masks or processes required. This eliminates costly manufacturing steps normally involved with floating gate memory, while reducing the engineering effort and associated costs of integrating NVM into system-on-chip (SoC) designs.

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