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Memory Interfaces

Tue, 07/17/2007 - 9:05am
Lattice Semiconductor Corporation announces FPGA support and performance for HyperTransport™ technology and three popular memory interfaces. The LatticeSC™ and LatticeSCM™ FPGA families (collectively, the "LatticeSC/M" families) now support HyperTransport technology at rates up to 1600 Mb/s, QDRII+ rates up to 750 Mb/s, RLDRAM® II rates of 800 Mb/s and DDR2 interface speeds of 667 Mb/s. HyperTransport technology and the memory interfaces are implemented using the LatticeSC/M families’ PURESPEED™ I/O technology. The memory controller IP (intellectual property) is implemented in Lattice’s low power Masked Array for Cost Optimization (MACO™) structured ASIC technology.

www.latticesemi.com 503-268-8000     
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