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Multi-Chip Package

Thu, 11/16/2006 - 11:10am

White Electronic Designs Corporation introduces its 4 Gb (512MB) DDR SDRAM PBGA Multi-Chip Package (MCP). The SDRAM is organized as 64 M × 72, packaged in a 25 × 32 mm, 800 mm2, 219 plastic ball grid array (PBGA). This package is suitable for high-reliability applications and is available at data rates of 200, 250, 266 and 333 Mbs in commercial, industrial and military temperature ranges. Benefits include a 66% space savings versus a comparable density using thin small-outline packages (TSOPs), 55% I/O reduction versus TSOP, reduced trace lengths for lower parasitic capacitance and reduced part count. It delivers high density for increased performance.


White Electronic Designs


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