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Analyzing and Debugging Streamlined

Fri, 08/11/2006 - 10:48am

Novas Software, Inc. has introduced a set of capabilities that streamline the process of analyzing and debugging assertion failures for users of SystemVerilog Assertions (SVA). These features use Novas’ patented behavior-based debug techniques to automate the analysis of complex assertion behavior and enable isolation of the root cause of failures. These enhancements are available in the latest release of the Verdi™ Automated Debug System that directs the process of tracing from the assertion failure point to the offending design signals, automatically decomposing the assertion and identifying the parts of the description that contribute to the failure.


Novas Software, Inc.


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