Chip-Level IP Device
Jennic announces its Serial RapidIOR to PCI Bridge. Jennic has developed its first chip-level IP product, a Serial RapidIO to PCI Bridge with future bridges to include Serial RapidIO to PCI-Express and SPI-4.2. The Serial RapidIO to PCI Bridge appears as a bi-directional, transparent bridge between the two interfaces. By using address mapped windows, programmable translation parameters and integrated DMA controllers, data transactions between the two interfaces are handled with the minimum of host processor intervention. This allows users to extend the functionality and performance of their existing PCI bus based systems by providing the capability to connect into a switched Serial RapidIO architecture. Jennic will provide the bridge as either an FPGA netlist, pre-programmed FPGA or an ASIC IP license.