Cadence Design Systems, Inc. announces a set of services for SoC designers embedding PowerPC cores, including silicon validation of a new custom-synthesized design approach. Compared to a full-synthesis approach, the Cadence® custom-synthesized approach achieves a 20% to 30% increase in processor speed while reducing chip area by 40%. Cadence Engineering Services achieves these results using the company’s Virtuoso® custom design platform to do full-custom design on the eight to 10 design blocks that most affect timing, power and area, such as the demanding CAMRAMs on the PowerPC 440 core. The remaining blocks are designed using Cadence's RTL Compiler synthesis, which has provided good results for cycle time and chip real estate in PowerPC applications. The custom-synthesized approach for PowerPC designers was validated in silicon by using a PowerPC 440 on the TSMC 130-LV manufacturing process.
Cadence Design Systems, Inc.