PLL Clock Generation IC
ON Semiconductor announces the NB4N507A the first in a series of fully-integrated phase lock loop (PLL) ICs designed to replace expensive crystal oscillators for clock generation in a variety of consumer and networking applications. The NB4N507A generates a clock signal ranging from 50 to 200 MHz via a reference crystal. The IC has a maximum RMS period jitter of < 10 ps. Because the NB4N507A is fully configurable, a single device can be used to generate different frequencies within a system and can be reused on future designs regardless of changes in timing requirements.