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A Simulation Technique for Amplifier Performance Verification

Thu, 06/02/2005 - 12:00pm
Spending a few minutes simulating can save days of manually tuning a circuit with lumped components and distributed lines for matching networks.
By Anurag Bhargava



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Figure 1, left. Combined layout of input and output circuit of a 5350 MHz ±112.5 MHz MESFET amplifier.
In today’s fast paced developmental environments, a design simulation methodology that makes a circuit function immediately without the need for tuning and optimizing is extremely valuable. Such circuit simulation ensures that after fabrication performance is met, which can avoid expensive repeated fabrication if the design is flawed.

This article discusses a novel simulation-oriented verification procedure that will verify the design of small signal amplifiers in one pass and requires no tuning at testing.

General Design Methodology for Amplifiers

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Figure 2, right. Layout with input/output ports and internal ports for external elements.
The following information compares the simulated and measured results for several amplifiers, including two microwave devices commonly used to design small signal amplifiers.

The problem has been that if a certain amplifier had to be simulated using an EM simulator, it was necessary to break the circuit into at least two parts — input matching and output matching. It is necessary to simulate each separately, within the EM environment, pass their 2-port S-parameters to a intermediate file and, once again, import these S-parameters into circuit simulation environment along with input/output coupling capacitors, device S-parameters or a non- linear model — whichever was used for the circuit simulation purposes and the stabilizing network. In short, the process involved is too cumbersome and time-consuming, and it introduces potential sources of error.


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Figure 3, above. "Momentum Component Parameter" window.
Many designers do not use EM simulation for amplifier designs. Instead they design and optimize the amplifier circuit and layout, and then performing yield analysis and design centering (if necessary) and load the circuit for fabrication. Unfortunately, more often than not, the designer needs to tune the amplifier circuit using gold ribbon tuning or to perform lumped element tuning using capacitor tuning sticks because yield analysis only takes component tolerance variation into account. Yield analysis has nothing to do with cross-coupling between lines and many other factors that can only be traced if an EM simulation is performed on the circuit.

For some designers this type of tuning can be difficult and time-consuming. There is method that boosts the success ratio to at least 99%. It is available using commercial software. Following is the discussion and methodology, using such software, for achieving a first-time error-free design. The following design comparison is only for amplifiers, but the process is same for all types of circuits and can be applied elsewhere.

Setting Up Verification Simulation

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Figure 4. "Information Message" window showing status.
The “verification” mentioned here should not be confused with any of the DRC or LVD tools. Verification means “to simulate the designed circuit in the EM simulation environment without splitting the circuit into many parts.” The intent is to simplify simulation setup with almost no error components.

The tool used in this case is the EM co-simulation integrated into the ADS2002 software package. However, this procedure can be used with any software that offers similar functionality. This tool allows users to simulate the circuit partly in the EM environment (such as matching networks) and partly in the circuit simulation environment (such as lumped component and BJT/MESFET linear models or non-linear models) in a single window.


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Figure 5. "Momentum Component" as it appears in "Schematic" window.
To set up this type of simulation, combine the full layout of the designed circuit in one layout window as shown in Figure 1.

Ports should be connected at I/Os and wherever a lumped element or any external component needs to be connected in the full simulation environment. Modify the port type as “Internal” using the Port Editor option. The port type for input and output terminals should be kept as “Single” with the desired impedance (normally 50Ω). The layout is shown in Figure 2 with all ports connected.

When the port definition has been completed, configure it as a component that appears in “Schematic.” The choice is available to the user to make it look like a black box or to represent it as a layout in the schematic. This can be done using the “Momentum> Component> Create/Update” option available in this particular software package.


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Figure 6. "Integrated Simulation" window for 5350 ±112.5 MHz amplifier with all lumped element and Infineon's CFY25-20 MESFET's S-parameter file added for full simulation. Layout not to scale.
As shown in Figure 3, the symbol type for this momentum component can be selected as layout look-alike or black box. The simulation type for this component can be selected as Momentum MW or Momentum RF. The substrate definition that needs to be used can be defined in substrate option. The lowest and highest frequencies need to be defined along with mesh density for the EM simulation. The edge mesh option can be checked if the circuit consists of some parallel lines, to take their coupling effect into account more accurately.

If there is no error in the set-up, then the window shown in Figure 4 will appear.

The newly created Momentum component can be placed in the Schematic window by selecting the same name as Layout design in which this component was created. Then the component will appear as shown in Figure 5. The reference port for this component needs to be grounded for simulation purposes.


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Figure 7. Simulated and measured results for 5350 MHz ±112.5 MHz CFY25-20 MESFET amplifier.
The Lumped components and Device’s Non-linear model or Linear S-parameters can be added to this component to simulate the overall circuit as shown in Figure 6.

Simulation can be controlled either from the schematic or from the layout by setting the Simcontrol option as required.

The status of the simulation is shown in the pop-up window, which displays the Momentum simulation status first. A window will appear, and when momentum simulation has been completed, a schematic simulation status window will be opened by the simulator to finish the overall simulation.


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Figure 8. "Integrated Simulation" window for 850 MHz BFY193 BJT amplifier.
The procedure above was adopted to set up EM co-simulation of 850 MHz BJT and 1500 MHz ±50 MHz MESFET amplifiers that are shown in Figures 8 and 10. Simulated and measured results are compared in Figures 7, 9 and 11 for a 5350 MHz ±112.5 MHz MESFET amplifier, an 850 MHz BJT amplifier and a 1500 MHz ±50 MHz MESFET amplifier, respectively.

Simulation and Measurement Results for Amplifiers

The graphs show that the measured performance is either better than or at least equal to the simulated performance for the amplifiers, which proves the utility of simulating the designed circuit using the EM co-simulation option available in ADS2002 for accurate results without spending time tuning the circuit. Ideally, EM co-simulation should be performed after the yield analysis and design centering as a final tool for verifying circuit performance.


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Figure 9. Simulation results for 850 MHz BFY193 BJT amplifier.
Conclusion
By including one more step in the simulation procedure, a lot of effort and man-hours can be saved and circuits can be designed more efficiently and accurately.












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Figure 10. "Integrated Simulation" window for 1500 MHz ±50 MHz CFY25-20 MESFET amplifier.

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Figure 11. Simulation results for 1500 MHz ±50 MHz CFY25-20 MESFET amplifier.
WD&D

About the Author
Anurag Bhargava is a
scientist/engineer-SD, MSTD/MSG, Space Applications Centre,Indian Space Research Organisation, Ahmedabad (Gujarat) – 380 015, India. E-mail: anuragbhargava@rediffmail.com.
Acknowledgement
The author thanks Shri. S. S. Rana, group director, Microwave Sensors Group, SAC, ISRO and Shri. V.H. Bora, head-MSTD and Shri. C.V.N. Rao, scientist/engineer-SE for guidance and support.
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