Wed, 06/01/2005 - 7:22am
AccelChip introduces fixed-point linear algebra intellectual property (IP) as stand-alone RTL cores. Initial offerings provided in the AccelCore product line include matrix inverse and factorization cores used in applications such as beamforming, software-defined radio, radar/sonar, Kalman filtering and other wireless applications. Intended for algorithm developers and hardware designers who are retargeting software algorithms to FPGAs and ASICs, the IP cores deliver synthesizable, pre-verified DSP functions for rapid development designs requiring matrix inversion or factorization. The first release of AccelCore IP cores from AccelChip performs matrix inversion and factorization using two methods triangular-orthogonal factorization, or QR factorization, as well as Cholesky factorization.