Fri, 02/25/2005 - 9:12am
Cadence announces capabilities built upon the leading Virtuoso® custom design platform. This offering combines RF extraction technology, two new design flows tailored for wireless chip design, engineering services, silicon-proven IP, and integration with technology from partners. Designers using Cadence Virtuoso AMS Designer can work with system design teams while leveraging a set of wireless standards libraries available for CoWare’s SPW product. They also can move a design from the system level to the IC level efficiently through the integration of MathWorks’ Matlab/Simulink with Virtuoso AMS Designer. Also included in the flows are Agilent’s proven RF design and test technologies--RFDE, Momentum and Ptolemy—and Helic’s VeloceRF, an advanced inductor design solution that minimizes errors associated with RF IC design cycles.
Cadence Design Systems, Inc.