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DSP Verification Software

Tue, 10/26/2004 - 11:39am

CoWare Inc. and AccelChip Inc. are teaming to provide an advanced design and verification flow for DSP designs that originate in MATLAB. The companies have integrated CoWare's DSP application design tool, SPW, with AccelChip's algorithmic synthesis tools to offer DSP design teams the ability to verify generated RTL levels in Verilog or VHDL within the SPW environment. The integration between SPW and AccelChip® DSP Synthesis lets designers using AccelChip's MATLAB-based, algorithm synthesis flow verify each level of their design in SPW.

AccelChip Inc.

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