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ASIC-Style Design Techniques for Programmable Devices

Wed, 09/29/2004 - 8:20am
As high gate count FPGAs become more common in wireless devices across all frequencies, the design problems long faced by ASIC designers are beginning to surface in these FPGAs as well.

By Salil Raje, Ph.D

Rapidly evolving standards have helped make FPGAs popular for wireless applications, Designers can continually modify FPGA-based systems, even in fielded products. The highest-performance and highest-density "Platform FPGAs" are frequently found in base station equipment supporting wireless systems, Designers can download logic changes to FPGAs instantly, without any manufacturing or field service cost, easing the support of dynamic standards.

What's more, FPGA gate counts have dramatically increased and prices have fallen, whereas ASIC design and manufacturing costs, per gate, continue to spiral skyward. Unless speed or power usage is particularly critical, or production volumes are extraordinary, it is usually difficult to justify the expense of Standard Cell ASICs.

Due to the equations in this article, we have made a PDF available for you to download.


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