Next Generation Power Chips for Next Generation Cell Phones
Approximately ten years ago when the first cellular phones emerged, they contained a number of discrete power components. The overall form of the first cell phones was very bulky, and their high power consumption only allowed for short standby and talk times. In response to increased consumer demand for smaller, higher performance wireless electronics, engineers have developed advanced design techniques, that allow saving PCB (printed circuit board) real estate and provide a faster and more efficient performance.
The introduction of simple, dedicated Power Management Unit ICs (PMUs) offered significant improvements, saved a lot of PCB space, and reduced overall costs. The technologies used for these devices were 1.2µm CMOS, BiCMOS or in some cases simple bipolar technology. In these early designs, the pass transistor of the high current LDOs had to be external, due to weak transistor performance, resulting in poor regulation characteristics and higher power drain, compared to today's more efficient designs.
Only when submicron CMOS processes were introduced could low impedance power transistors be integrated with justifiable silicon area and digital functionality could be increased with more complex state machines. Additionally, simple DC/DC converters, chargers and backlight switches became integrated into the PMUs.
Most vendors' preferred BiCMOS processes due to its better analog performance, but this came with much higher manufacturing costs compared to standard CMOS processes. In response, dedicated engineering efforts were undertaken in CMOS designs to yield special design techniques with nearly equal performance as BiCMOS.
Today, the demands on Power Management Unit ICs increase every day and new trends indicate that many or all features not currently covered by the chip set will eventually be integrated into the PMU. Very often considered an ASIC, these function-rich PMUs enable cell phone manufacturers to decide with very short notice to add special functionalities, demonstrating great flexibility. The more modern 0.35 μm/0.25 μm technologies allow for complex digital parts with up to 100k gates.
Another important issue is the 5 V compliance of the process, due to the direct battery connection. Fully charged Li-Ion Batteries exhibit 4.2 V, and even regulated AC adapters output 5 V. This will become one of the main challenges for future power chips, because the latest 0.18 μm/0.13 μm CMOS technologies are only available with 3.3 V options.