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Twin NPN Transistors

Mon, 05/06/2002 - 7:16am
California Eastern Laboratories (CEL) announced the availability of NEC's UPA twin transistors in a new, smaller package. With an outline of 1.2 × 0.8 mm and a height of 0.50 mm, the new 6 pin TD package is ideal for size-constrained applications like VCO modules for cellular and cordless phones, Special Mobile Radios, pagers, PCMCIA cards, keyless entry transmitters, and other portable wireless products. The package also features a flat lead design for reduced parasitic lead inductance and improved electrical performance.

NEC's first offering in this new TD package is the UPA862TD. Specifically designed for 1 to 3 GHz applications, the UPA862TD is a mixed die device that combines NEC's proven NE851 oscillator and NE685 buffer chips. The super low 1/f noise figure of the NE851 helps the designer achieve excellent phase noise performance, while on the buffer side, 12 GHz fT helps the device deliver good gain and power performance in the 1 to 2 GHz band. Each transistor is independently mounted within the device, making it easy for VCO engineers to configure oscillator/buffer and other two stage applications.

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