The SPT8000 is the most cost-effective high-performance, monolithic 14-bit, self-calibrating analog-to-digital converter on the market today. It uses a digitally calibrated, pipelined CMOS architecture to achieve excellent dynamic performance and linearity.
Also incorporated on chip are a high-performance sample-and-hold amplifier and internal references for minimal external circuitry. The internal references can be externally overdriven to allow accurate control of gain and offset. This makes the device an excellent fit for lab and test equipment.
The SPT8000 uses a proprietary internal calibration algorithm controlled by an internal microcontroller. After initial calibration, measured errors of each pipeline stage are stored in on-chip digital memory (RAM). During subsequent normal conversions, the microcontroller looks up the RAM contents and makes digital corrections to the errors, thus producing the final 14-bit digital output error free.
With a differential linearity error (DLE) at ± 0.5 LSB (typical) and an integral linearity error (ILE) at ± 1.2 LSB (typical), the SPT8000 is a perfect choice for applications that need high accuracy, such as image processing. The spurious free dynamic range (SFDR) is 87 dB, the signal-to-noise ratio (SNR) is 76.5 dB, and the total harmonic distortion (THD) is -84 dBc, all measured at the input frequency of 5 MHz. This performance makes the part ideal for wireless infrastructure applications.
To achieve this level of performance, historically, the ADC would be built in an expensive Bipolar or BiCMOS process, which would result in power dissipation in the range of 1.5 W. The SPT8000 is built in a pure CMOS process, thus achieving power dissipation of only 725 mW.
The SPT8000 is available in a single grade over the -40 to +85 degrees C industrial temperature range, in a 44-lead TQFP package.