Synchronous Pipeline Burst SRAM
The WEDPY256K72V-XBX operates on a 3.3 V power supply. All inputs/outputs are 2.5 V, using a separate I/O power supply. The SSRAM is designed for a 64-bit data bus, and contains 8 bit of parity. The PBGA has multiple VCC and VSS pins, and three chip selects for simple depth expansion. For portable applications, an automatic power-down mode is available. WEDPY256K72V-XBX is packaged in 159-bump PBGA, plastic ball grid array, 14 mm × 22 mm, to provide 16 Mbit of high performance secondary cache.