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Phase Locked Loop Offers Solution for MMDS Market

Thu, 08/30/2001 - 9:28am
Z-Communications announced a new phase-locked loop (PLL) module designed for the MMDS network market. The PLL2716A is designed to cover 2715 to 2717 MHz with a 1 MHz step size while delivering good phase noise performance. This PLL offers a clean spectral signal of -100 dBc at a 10 kHz offset and -123 dBc at a 100 kHz offset or, equivalently, a RMS phase error of 1.25 degrees integrated over 100 Hz to 100 kHz. The PLL2716A has further been optimized to greatly reduce susceptibility to microphonics with its 2 kHz loop bandwidth. The PLL2716A frees up the circuit designer from having to characterize the critical loop filter parameters and replaces dozens of components with a single, high-performance module.

With a minimum startup lock time of 5 mS and a channel-to-channel switching speed of 2 mS, the PLL2716A delivers 4 ± 2 dBm into a 50Ω load. Harmonic suppression is -20 dBc and sideband reference spurs are attenuated greater than -80 dBc. This PLL2716A can save space on the printed circuit board with a miniature package size of one-half square inch and increase battery life by drawing 30 mA with a 5 volt supply. The PLL2716A is specified to operate over the extended commercial temperature range of – 40°C to 85°C.

The PLL2716A comes in Z-Communications' low profile PLL package measuring 0.630× 0.866× 0.14. It is ideal for automated surface mount assembly and reflow soldering. It is available in tape and reel packaging for production requirements.

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