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PLL Clock Generators

Mon, 04/30/2001 - 7:10am
AMI Semiconductor (AMIS) expanded its clock generator product line today when it introduced a broad family of low-cost 1- and 2-phase-lock loop (PLL) clock integrated circuits (ICs). Compact footprints, multiple pin-out options and generation of common frequencies make this line of standard timing devices the ideal "workhorse" for dependable clock management in fixed-frequency systems, such as digital cameras, computer peripherals, printers, and local area network and gigabit ethernet hubs.

Several of the devices in this family are derived from a couple of common platforms. The platforms can be quickly and easily customized for frequencies, pinouts, and features in the final processing layers, similar to a gate array. First silicon for these semi-custom devices can typically be available in 4 to 6 weeks, making them a valuable time-to-market alternative to full-custom devices.

Each device in the AMIS 1- and 2-PLL clock generator family uses an on-board crystal oscillator to generate a reference frequency, which is used by the PLLs to generate precision output frequency ratios (ratiometric derivation). The crystal oscillator is suitable for any fundamental-mode crystals in the 5MHz to 30MHz range.

For video systems, which cannot tolerate unpredictable artifacts, dual-PLL models are available that generate three output clocks from the crystal reference by driving the frequency through an array of post-dividers. These three outputs are "locked" for low phase noise and low jitter, and to reduce electromagnetic interference (EMI) from harmonic stacking.

Both 3.3V and 5V versions are available for most models.

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