PLL Clock Drivers for High Speed Clocking Applications
The FMS7950 operates off a crystal or oscillator input with clock multiplier; the FMS7951 accepts a PECL clock input and features zero delay and clock multiplication capability. Both parts provide nine configurable CMOS outputs with less than 250 pos of output-to-output skew and less than 300 ps of cycle-to-cycle jitter.
The FMS7950 and FMS7951 are each packaged in a 32-lead LQFP and rated for 0 to 70°C operation. VDD range is 3.0 to 3.6 volts. A power down pin is provided for system testing.