DSP Board for Throughput Applications
The new PowerPC CHAMP-AV can use up to four of the latest generation of Motorola® 7410 PowerPC AltiVec RISC microprocessors, each running at 500-600MHz. To facilitate high-speed data movement and predictable math algorithm execution, this PowerPC CHAMP-AV includes large cache and local and global memories, seven onboard intelligent DMA controllers, and a user-programmable interrupt multiplexer, to form a powerful multi-processor computer system on a single 6U board.
This high performance board provides support for two PMC I/O modules to allow flexible and adaptable I/O expansion. Each PMC I/O expansion site is tightly coupled to a dual processor cluster and provides a dedicated processing compute node to real world I/O. Ixthos' strategic I/O partnerships can provide seamlessly integrated I/O solutions for applications requiring Fibrechannel, FPDP, T1/E1, ATM, Frame Relay, OC3/OC48 (Sonet), serial Link ports, 10/100BaseT and Gigabit Ethernet.
The CHAMP architecture enables the development of systems based on two scalable, redundant signal processing elements (SPEs) where each SPE contains two MPC 7410 PowerPC processors running at 450 - 600 MHz. Each SPE has access to over 2 Mbytes of L2 cache, 128 Mbytes of 64 bit-wide, high speed local SDRAM, and a dedicated industry standard PMC site, thus facilitating a flexible, low cost configuration to the specific I/O requirements for a variety of applications.
The four signal processing PowerPCs are supported by a core processing element (CPE) which is made up of an additional PowerPC controller (a 250 MHz MPC8240), global memory, semaphores, interrupt multiplexer and a dedicated Ethernet interface. The core processor can process data from any of its I/O sources independent of the compute cluster SPEs, or seamlessly serve as an I/O manager to DMA data to the four AltiVec processors for concurrent symmetrical multi-processing. Independent PCI-PCI data bridges separate the new board's core and signal processors, providing up to a Gbyte/sec of simultaneous I/O data movement, enabling concurrent I/O, Ethernet and VMEbus transfers.
CHAMP-AV software support includes Ixthos' integrated IXATools suite used to configure and control the DSPs and all board level resources. This software suite includes Host/Target support libraries, Smart DMA firmware that presents a common command interface to the backplane, PowerPCs and operating system-specific board support packages. A complete set of optimized DSP math libraries are provided by the comprehensive IXLibs-AV software. Supported operating systems include VxWorks and Linux. Extended temperature and conduction cooled versions of the new CHAMP-AV are available from DY4 Systems.
Global CPE memory for the CompactPCI CHAMP-AV is 32 or 64 Mbytes of high speed SDRAM, 64-bits wide. Local memory is 64 to 128 Mbytes of 64 bit wide SDRAM per SPE PowerPC pair. L2 cache is up to 2 Mbytes of SBSRAM (Synchronous Burst SRAM) per processor and FLASH memory is up to 16 MB.