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DSP Module

Tue, 02/13/2001 - 9:48am
Transtech DSP announces the TS-C35, a PMC format DSP module that uses Analog Devices' TigerSHARC™ DSP. The TS-C35 features a single DSP, 128 Mbytes SDRAM, 4 Mbytes FLASH, and a 64-bit/66 MHz PCI interface coupled to a Xilinx Virtex™ FPGA for high speed digital I/O and algorithm acceleration.

The TigerSHARC DSP, at the heart of the TS-C35, is a high-performance floating-point DSP that is well suited to current and next generation applications such as telecommunications infrastructure, RADAR/SONAR and software radio. The TigerSHARC DSP can mix 8, 16 and 32-bit data types natively on one device, enabling parallel operations and efficient data I/O to be implemented. The TigerSHARC has 6 Mbits of onboard zero wait-state SRAM enabling large amounts of program or data to be stored on chip. Four bi-directional link ports allow direct data transfer between TigerSHARC DSPs, enabling data to be streamed around the system easily for optimal performance. Link ports provide a simple mechanism to smoothly scale the number of DSPs within the system without relying on bus-based structures.

In addition to the TigerSHARC DSP, the TS-C35 has a Xilinx Virtex™ FPGA (XCV50 to XCV300E) tightly coupled to the 64bit PCI bus and the TigerSHARC DSP. High-speed digital I/O with 64 FPGA signals are routed to a header near the front panel. These 64 I/O signals are also available to the PMC user I/O connector via an isolating buffer for non-front panel based I/O. Small adapter modules allow a variety of standard and custom digital interfaces to be used such as FPDP (Front Panel Data Port), digital camera interfaces, link ports, LVDS or ADSP-21060 compatible link ports. FPDP is used by analog I/O boards extensively in RADAR, SONAR and software radio applications.

For application specific compute intensive tasks line telecommunications or image inspection, the Virtex FPGA can be used as a co-processor to the DSP when not used for I/O. A private 1 Mbyte option is available for the FPGA. FPGAs used this way excel at simple parallel operations such as viterbi decoders, data pre-processing and encoders.

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