Lattice Semiconductor Corporation announces its ispClock second generation family of enhanced zero-delay clock generators, the ispClock5600A devices, along with the first device, the ispClock5620A. The programmable, E2CMOS®-based ispClock5620 devices can generate up to 20 clock outputs, each with independently programmable output skew, I/O standard and frequency selection. The non-volatile, in-system programmable ispClock5600A devices are pin compatible with Lattice’s first generation ispClock5600 devices, but provide additional features and parametric enhancements. For example, the maximum VCO operating frequency of the ispClock5600A devices has been increased to 800 MHz. This supports the generation of popular clock frequencies such as 33.33 MHz, 100 MHz, 133.33 MHz and 50 MHz simultaneously from a single master frequency. The input clock frequency range has been extended (5 to 400 MHz) to enable support at 8.192 MHz. The ispClock5600A devices use seven on-chip counters (input, feedback and five for outputs) to provide fine granularity output frequency generation.
Lattice Semiconductor Corporation