The company's new single-chip MPEG-4 CODEC features 12 Mb of embedded DRAM reducing power dissipation to 80 mW. As a result, Toshiba's solution has the potential to more than double the battery life in a mobile videophone compared to the same phone using off-chip memory.
The TC35273XB performs 15 frames per second into a QCIF (176 × 144 pixels) video display, along with an audio CODEC that can support multiple audio CODECs including Adaptive Multi Rate (AMR) speech CODEC at a clock frequency of 70-MHz. Three signal processing units, an MPEG-4 video CODEC, an audio CODEC/decoder, and a multiplex/demultiplex unit are integrated on the single-chip. The video core consists of a 16 bit RISC processor and dedicated hardware accelerators that allow programmability while delivering high performance and low-power dissipation. The firmware program for the RISC processor is downloaded into the embedded DRAM before beginning any operation. Additional applications, such as H.263, are performed by using the appropriate firmware. Features also include a general host interface in order to support various host processors, as well as a special-designed gating input/output (I/O) that allows power supply to be cut-off to the internal circuits while keeping the I/O activated.