Two FPGA Families Support QDRII/II+ Rates up to 750 Mbps
Lattice Semiconductor Corporation announces FPGA-based support for Quad Data Rate (QDR) II/II+ memory devices. The LatticeSC and LatticeSCM FPGA families support QDRII/II+ rates up to 750 Mbps. The high-speed QDR II and QDR II+ memory controller IP (intellectual property) is implemented in low power Masked Array for Cost Optimization (MACO) structured ASIC technology. The Quad Data Rate II+ memory devices allow data rates above 250 MHz. These SRAMs are well suited for high-bandwidth, low latency applications. The read and write ports run independently, and they allow designers to maximize bandwidth without concern for bus contention issues. They are appropriate for high-bandwidth applications in which they serve as the main memory for look-up tables, linked lists and controller buffer memory.