Atmel announces the ATU18, a complete set of 0.18 micron structured array matrices to convert most FPGA/CPLDs with Atmel's Ultimate Logic Conversion (ULC). With the ATU18 matrices, Atmel can handle up to 1,200 kb Dual Port RAM, 1,600 k gates, PLLs and multipliers in a single chip. These memory blocks are compatible with embedded memory blocks from FPGA/CPLD makers Xilinx and Altera. The 51 micron pad pitch allows reduction of die size even for high pin count conversions that are pad limited. The solution uses wafer metal layers to configure the ULC, offering low Non-Recurring Engineering (NRE) charges. With its 0.18 micron process, Atmel ULC's can support complexities equivalent to 8,000K FPGA gates.