PECL Clock/Data Multiplexers
The SY100EP56V dual differential 2:1 MUX is offered in a 20-pin TSSOP package. The SY100EP57V differential 4:1 MUX is also offered in a 20-pin TSSOP package. The SY100EP58V 2:1 MUX is offered in an 8-pin SOIC and MSOP package. These devices feature low jitter performance optimized for communications applications extremely low random jitter and deterministic jitter of less than 1 psrms
and less than 25 ps pk-pk
, respectively. Other key features include guaranteed AC parameters over temperature and supply voltage; maximum frequency greater than 3 GHz, within device skew (SY100EP56V) less than 100 ps, and output rise and fall time of less than 230 ps. All three multiplexers operate from a wide supply voltage between +3.0 V and +5.5 V, and are guaranteed over the 㫀°C to +85°C temperature range.