Noise on Vcc - a Challenge for PLL Designers
by Wolfgang Damm, Director Product Marketing – Wireless Telecom Group
Highest component integration and ultra-fast switching speed of electronic chips and devices forces circuit designers to re-think their Vcc and GND architecture.
The Vcc level should be flat and GND should be a clean reference – unfortunately, this is not always the case. With increasing integration and growing requirements for speed and accuracy, noise starts to permeate supply power and, even if minute, may affect the functionality of integrated circuits and systems. Noise is caused by external sources like switching power supplies, or by internal sources; including switching output drivers.
Phase-Locked Loop (PLL) circuits are widely used for frequency generation, clock synchronization and in demodulators or FSK decoders. Their functionality is based on phase sensitive detection of differences between input and output signals of the controlled oscillator, PLLs are very sensitive to changes in Vcc levels.
The actual power source for integrated circuits on a printed circuit board is not the power supply, but their Vcc Pin. Filter capacitors smooth and filter power, but have limitations like their impedance. Charge may not be moved fast enough to switching semiconductors, causing temporary power level offsets at the Vcc pin.
Adequately dimensioned power supplies provide sufficient energy to maintain a stable supply voltage for the circuit during all states of its operation. Transport of this energy to the integrated circuits is another matter. Advanced circuit design embraces fast signal responses, and considers cables, connectors, and trace lines as small inductances. While of low value, the inductances delay energy flow to the Vcc pin, resulting in transitory offsets seen at the IC’s Vcc pin; particularly when fast di/dt drains are generated by switching digital circuits.
Many design tools simulate noise energy levels at the Vcc path, but the only way to ensure that the design functions properly is to actually inject noise energy or a CW signal into the Vcc path of a real circuit and analyze the chip’s response. Instruments like Noisecom’s JV9000 Vcc Noise Generator provide these signals. Defined levels of noise or CW signals are coupled onto Vcc, allowing study of the circuit’s noise immunity. By using defined noise levels measurements are repeatable and offer a reliable reference for noise on Vcc analysis.
March 22, 2012