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MOBILE WORLD CONGRESS –- Barcelona -- Texas Instruments Incorporated (TI) today unveiled a new multi-standard wireless base station System-on-Chip (SoC) delivering double the LTE performance and a 2x power/performance improvement over existing macro and compact base station SoC solutions developed in 40-nm process technology.

Based on TI’s new TMS320C66x digital signal processor (DSP) generation, the TMS320TCI6618 utilizes a strategic design approach that accelerates the well-defined standard aspects of LTE. In addition, the programmable DSP cores allow customer differentiation in advanced techniques such as scheduling and multiple-input and multiple-output (MIMO) antenna processing.

As wireless data rates increase with high-speed 3G and 4G services, the ability to efficiently handle the high numbers of bits flowing through base stations becomes critically important in SoC design. With the TCI6618, TI is introducing new hardware acceleration focused on this bit-rate processing which increases the SoC system performance and enables advanced receiver algorithms, achieving higher spectral efficiencies than competitive solutions.

For the first time in an integrated base station SoC, TI’s innovative architecture enables iterative decoding techniques, such as turbo interference cancellation, which can yield up to 40 percent or more spectral efficiency over conventional decoding techniques. These techniques, coupled with the powerful MIMO processing capabilities of TI’s new fixed/floating point C66x DSP core, yield a SoC that delivers on the promise of 4G.

Key features and benefits include:

* Developed on TI’s KeyStone multicore architecture and powerful new C66x DSP cores, TCI6618 enables scalability and portability from macro to small cells while reducing product development expenses;

* Advanced C66x cores with integrated floating point capability provide full programmability and 5x performance improvement in critical algorithms such as MIMO and scheduling - both key areas of differentiation for customers;

* New multi-standard Bit Rate Coprocessor (BCP) accelerates bit rate processing for LTE, WCDMA, TD-SCDMA and WiMAX, substantially increasing system capacity and performance with lowest latency;

* Scalable KeyStone architecture provides a non blocking 2 Tbps switch fabric, featuring high throughput system interconnect and zero copy multicore infrastructure;

* Industry leading power reduction technologies, including TI’s SmartReflex™ power management, memory retention and dynamic power management, deliver lowest power levels for base stations;

* High-performance 40-nm process technology ensures robust performance and unmatched value for base station developers;

* Balanced programmable CPU cores and configurable accelerators enable software defined radio with a simplified programming model.

While at MWC, visit TI at Booth 8A84 (Hall 8) to learn more about the latest communications infrastructure, analog, wireless and DLP news, and to check out a broad range of TI-based demos. For more information please visit www.ti.com/mwc2011


Texas Instruments
http://www.ti.com