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With ChipVision's PowerOpt™ and P-SAM, users can evaluate performance, area and power tradeoffs at the architectural level rather than the gate level, resulting in significant savings. PowerOpt performs synthesis, analysis and estimation, and generates RTL code automatically to bridge the gap between specification at the system level and implementation at the RT level. The P-SAM ESL analysis framework provides dynamic visibility into power consumed across the peripherals, interconnect, processor and memory of a virtual SoC platform. PowerOpt reduces energy needs in critical semiconductor blocks by up to 75% and achieves results 3x faster than lower-level methods.

Chip Vision Design System
2880 Zanker Road, Ste. 203
San Jose, CA, 95134