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Developed on 90 nm CMOS technology High-speed embedded SERDES I/O Suitable for cost-conscious markets

Lattice Semiconductor Corporation announces that all five of its LatticeECP2M FPGA devices, ranging in density from 20K LUTS to 95K LUTS, have been qualified and released to volume production. Developed on advanced 90 nm CMOS technology utilizing 300 mm wafers, the LatticeECP2M devices are low-cost FPGAs that offer high-speed embedded SERDES I/O, plus a pre-engineered Physical Coding Sublayer (PCS) block. Previously, high-speed embedded SERDES serial I/O with speeds over 3Gbps had been available only on relatively expensive high-end FPGAs. Integrating this capability into a low-cost FPGA fabric has made this higher performance interface technology accessible to a much broader range of applications in rapidly emerging, cost-conscious markets such as high volume communications, consumer, automotive, video and industrial equipment. The LatticeECP2M devices also have increased on-chip memory capacity to support

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