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Magma Design Automation, Inc. announces its Talus QDRC physical design verification product that improves productivity and time to market for 65 and 45/40 nm designs by identifying and correcting design rule violations during implementation. Unlike prevailing DRC methods that require streaming data from an implementation database, the device decreases overall design costs by addressing Design Rule Check (DRC) problems before they delay design tape-out. It operates systematically during implementation, reducing the post-implementation DRC sign-off effort and shortening the final physical design verification stage of chip development. The device has access to all layout layers with IP reference views to identify common problems that can affect final sign-off downstream in the flow.


www.magma-da.com
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Magma Design Automation
5460 Bayfront Plaza
Santa Clara, CA, 95054-3600