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Xpedion announces its GoldenGate Simulator version 3.4. This release has an increased capacity of 50 percent over version 3.3, yielding convergence on circuits with over 10,000 active devices and 1,000,000 parasitic devices. Speed has been increased by over 40%. The software's use of native Spectre design kits includes automatic compilation of Verilog-A models. An automated EVM (error vector magnitude) calculation, allows designers to obtain this figure of merit. Support for LSF allows designers to utilize compute farms for increased characterization. Finally, improvements in the core algorithms increase convergence on large circuits. The GoldenGate RFIC simulator has been developed for RFIC designers who wish to perform advanced simulation and analysis. GoldenGate is integrated with Cadence's Analog Design Environment (ADE) and uses Spectre Process Design Kits natively without the need for translation.

Xpedion Design Systems

Xpedion Design Systems
http://www.xpedion.com