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Cadence introduces the Cadence® Virtuoso® Resolution Enhancement Technology (RET) Suite. The Virtuoso RET Suite integrates lithography awareness directly into the Cadence Virtuoso custom design platform, a design environment for custom ICs. With the Virtuoso RET Suite, designers targeting sub-90 nm manufacturing technologies are now able to create layout designs that are less sensitive to critical yield-degrading lithography issues, and which are de-sensitized to common lithography-process variations. The Virtuoso RET Suite allows designers to analyze and optimize designs for both performance and yield by examining how target layout structures will appear in silicon. This is done by modeling the distortions that are inherent in today's sub-wavelength lithography. The suite includes interactive model-based simulation of layout designs, batch and interactive lithography rule checking, lithography-yield analysis and optimization, and trial-based optical-proximity-correction (OPC) capabilities utilizing critical lithographic parameters, including illumination mode, exposure and focus.

Cadence Design Systems