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California Eastern Laboratories is debuting the NEC newest, highly integrated front-end receiver chip for global positioning system (GPS) applications. The UPB1009K is a single-chip double-conversion RF-to-IF I/Q frequency translator designed to provide a complete RF front end for these GPS receivers. It has been specifically designed to be compatible with wideband code-division multiple access (W-CDMA), the global system for mobile communications (GSM), and personal digital cellular (PDC) systems. Highly integrated, The UPB1009K chip combines a low-noise amplifier (LNA), voltage-controlled oscillator (VCO), phase-lock loop (PLL) and intermediate frequency automatic gain control (IF AGC) amplifiers. The device further offers IF filtering, in-phase and quadrature (I/Q) demodulators, I/Q IF amplifiers, and a 4-bit analog-to-digital (A/D) converter, all in a single, compact 44 pin QFN package.

For consumer GPS devices, the UPB1009K offers a single-chip double-conversion RF-to-IF I/Q frequency translator in a single package.

Technical Overview

The on-board fractional-N PLL can use four temperature controlled crystal oscillator (TCXO) reference frequencies, enabling the UPB1009K to share the TXCO with other functional blocks like the central processing unit (CPU), the voice RF receiver, or the baseband IC. Moreover, use of a TCXO with a frequency of 16.368 MHz/16.384 MHz, 14.4 MHz, 19.2 MHz, or 26 MHz switchable with an on-chip divider, is possible. This multiple system reference clock enables the UPB1009K to share the TXCO function across a variety of different handheld communications platforms.

Significant Features

The device consumes a low, 80 mW of power and features four different PowerSave modes. Since the UPB1009K comes in a 44-pin QFN miniature package footprint, the device is particularly suitable for battery-powered handheld wireless and related products. A birds-eye view of the salient specifications and technologies include: • Double conversion : f_REFin = 16.368 MHz, f_1stIFin = 61.380 MHz, f_2ndIFin = 4.092 MHz: f_REFin = 14.4, 16.384, 19.2, 26 MHz, f_REFin = 62.980 MHz, f_2ndIFin = 2.556 MHz • Multiple system clocks: On-chip switchable frequency divider (1/N = 100, 3/256, 9/1024, 65/4096) • A/D converter: On-chip 4-bit A/D converter • High-density RF block: On-chip VCO tank circuit and 2^nd IF filter • Supply voltage : VCC = 2.7 to 3.3 VDC • Current consumption: ICC = 26.0 mA typical @ VCC = 3.0 Volts, N = 100 • High-density surface mountable: 44-pin plastic QFN

With stock and availability now, the UPB1009K is priced at $4.30 in 50K quantities.

California Eastern Laboratories

California Eastern Laboratories
http://www.cel.com