Reduce Development Cost and Design Risk
ChipVision Design Systems announces breakthrough, patented Electronic System Level (ESL) technology that lets RTL designers work interactively with system-level descriptions to generate power-optimized Register Transfer Level (RTL) code. It creates implementation trade-off options for RTL designers, and immediately and accurately implements their visualized choices. Using this technology at the system level to analyze power can result in pre-RTL energy savings of up to 75%, shorten time-to-results by a factor of 60, and create code that is nine times more compact.
www.chipvision.com
408-449-4550
Chip Vision Design System
2880 Zanker Road, Ste. 203
San Jose, CA, 95134
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