Processor Cores
ARC International announces that their ARC 600 and 700 families now include eleven configurable cores that offer pre-optimized size, speed, and power characteristics to enable developers to meet requirements of high-growth embedded markets. The ARC 600 family of processor cores uses a five-stage pipeline to deliver 1.3 DMIPS/MHz performance. The cores’ small size and power consumption make them suitable for battery-operated and cost-sensitive devices. The ARC 700 family of cores uses a seven-stage pipeline to deliver 1.2 DMIPS/MHz performance. Each core has DSP capability as a standard feature with optional DSP functions in the form of the ARC XY Advanced DSP subsystem. RTOS and secure processing support is provided, as is the option for a Memory Management Unit (MMU). The 700 core family also makes a suitable platform for devices requiring embedded Linux.
ARC International
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© 2008 Advantage Business Media
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