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Cadence Design Systems, Inc. extends the capabilities of the Cadence® Encounter® digital IC design platform with the addition of its Encounter Timing System. This system provides customers a single source and consistent view of timing, signal integrity and power — from design and physical implementation, through final signoff analysis. In addition, front-end design teams will also benefit from its global timing debug features for accurate root-cause analysis and fast timing closure, which is driven by a powerful graphical user interface. With Encounter Timing System, digital IC designers working through the challenges of continually shrinking process nodes gain improved time to market, better productivity, the ability to bring signoff-quality timing and signal-integrity analysis to all aspects of the design flow and total cost of ownership.

Cadence